Integrated circuits (ICs) are miniaturized electronic circuits that typically include semiconductor devices as well as other components, and have widespread applications throughout the world of electronics. The semiconductor devices used within ICs include a number of electrical components disposed next to each other. Semiconductor devices are typically fabricated by sequentially depositing insulating or dielectric layers, conductive layers, and semiconductive layers of material over a semiconductor substrate, and patterning the various layers using lithography to form circuit components and elements thereon, forming integrated circuits.
To prevent electrical current leakage between regions of the semiconductor substrate, including active transistor regions, substrate contact regions, etc., semiconductor devices are designed to include shallow trench isolation (STI) areas. These STI areas prevent electrical current leakage between the regions. STI areas are typically distributed throughout the semiconductor device and separate the regions from each other.
STI areas can be formed by using a series of different techniques well known in the art, such as trench definition and etching, optionally lining the trench with a diffusion barrier, and filling the trench with a trench dielectric such as an oxide. Various oxides and nitrides are frequently used as the STI dielectric material. Conventionally, STI areas do not contain any electrical components and are used for the primary purpose of separating active transistor regions.
[FIG. 1 depicts a cross-section of a semiconductor chip 1 having conventional STI areas 2. As shown in FIG. 1, the STI area 2 isolates active transistor regions 3 and 4 from each other. For example, the STI area 2 isolates the active transistor regions 3 and 4 to prevent electrical current leakage between the two active transistor regions 3 and 4. One of the active transistor regions 3 and 4 may also be a substrate contact region. As a result, the performances of the active transistor regions 3 and 4 are not affected by electrical current leakage.
FIG. 2 depicts a top view of a semicustom block 60, such as the Infineon™ M1580 semicustom block, having the semiconductor chip 1 shown in FIG. 1. Semicustom blocks consist of pre-defined standard cells. The block 60 includes a number of active components, such as the semiconductor chip 1, other active transistor regions (e.g., FETs), and a number of passive components. The block 60 further includes a number of STI areas 61 disposed in between active transistor regions 62 and 63 to prevent electrical current leakage between the two active transistor regions 62 and 63. As shown in the block 60, the STI areas 61 are devoid of any electrical components.
Additionally, semiconductors often utilize buffer capacitors (also referred to as CAPs) to protect the integrity of the electrical components. These CAPs, which may include special capacitance cells, capacitance macros and metal-insulator-metal (MIM) CAPs, are utilized to suppress voltage surges that might otherwise damage other parts in the circuit. Accordingly, these CAPs stabilize the internal chip VDD voltage supply and the internal chip bias nodes. Also, area-neutral parasitic capacitors—such as a junction capacitor between the n-well and p-substrate—may be utilized as well.
However, buffer capacitors frequently use 10%-20% of the available chip space, or even more for specific chips. Furthermore, the area-neutral parasitic capacitors contribute only a relatively small amount to the overall capacitance that is required, and are also rather inefficient due to the high-resistance lines frequently employed in their design.
Accordingly, there is a need to more efficiently utilize existing semiconductor chip space to house buffer capacitors, especially given the significant emphasis on miniaturization of ICs. Furthermore, there is a need to conserve overall space throughout the semiconductor chip. There is also a need to distribute a sufficient amount of buffer capacitors throughout the semiconductor chip to achieve the overall capacitance that is required to protect the electrical components from voltage surges and other electrical disturbances. There is additionally a need to distribute the buffer capacitors evenly throughout the semiconductor chip.